Quantcast
Channel: Mellanox Interconnect Community: Message List
Viewing all articles
Browse latest Browse all 6275

Re: ConnectX-3 CX312A-XCBT and Thunderbolt

$
0
0

With the device in an HP, I can view the PCIe Link Capability register.

 

I find that it has a value of 843f483.

 

Ignoring the 'port #' field, I find that this indicates:

     supported link speeds: 3 (no idea how to interpret)

     max link width: 8

     Active State PM support: <11:10> = 1

     Data Link Layer Active Reporting Capable: <20> = 0

     Link B/W Notification Capable: <21> = 0

     Bit 22 Reserved: = 1

 

The EchoExpressPro Link Capability register is 333fc41

 

     Bit 22 Reserved = 0

     <21> = 1

     <20> = 1

     <11:10> = 3

 

Don't know if it enforces any of these to be certain values, in particular <11:10>.

 

I can find no clear description of the PCI config space settings in any of the Mellanox docs.

I am used to having an explicit (often wrong) enumeration of the PCI config space settings for a device.

 

If there some other manual I am missing?

 

The Mellanox card supports L0s, but not L1 ASPM.

 

This sounds like it might be the crux of the biscuit, but I note that the Intel 82599EB I have only supports L0s, and I was under the impression that at least some Intel 10Gig cards were certified as working: the SmallTree 82599-based product is on the supported list.


Viewing all articles
Browse latest Browse all 6275

Trending Articles



<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>